Adc Noise Floor Measurement

For that we terminated the input of adc and captured the digital samples using fpga.

Adc noise floor measurement.

We want to measure the noise floor of my adc ads61b29 12 bit 50msps. Measure the snr of the adc in nyquist bandwidth usually 0 5db or 1db below fullscale normalize the converter s noise power to a 1hz bandwidth by simply subtracting 10log fs 2 from the snr value. Since the noise is approximately gaussian. Experiment setup details.

Fft output for an ideal 12 bit adc input 2 111mhz f s 82msps average of 5 ffts m 8192 data generated from. Two s complement enabled in adc. To measure the amount of input referred noise the input of the adc is either grounded or connected to a heavily decoupled voltage source and a large number of output samples are collected and plotted as a histogram referred to as a grounded input histogram if the input is nominally at zero volts. In practice however the noise floor will always be higher than this due to electronic noise.

Determine the thermal quantization noise floor level in dbm either from the component vendor s data sheet or by measurement for a small signal input level on the order of 35dbfs. For example the noise floor of a 16 bit measurement system can never be better than 96db and for a 24 bit system the lower limit is limited to 144 db. We are having some doubts in the calculation. Calculate the normalized noise floor level in 1hz bandwidth by subtracting 10 log f sample 2 where f sample is given in units of hz.

Calculate the input noise of the converter which is the theoretical thermal noise floor limit ktb 174dbm at room temperature. This is split into 2 experiments.